white microelectronics ? phoenix, az ? (602) 437-1520 3 sram monolithics 1 512kx16 sram module advanced* features n access times 17, 20, 25, 35ns n mil-std-883 compliant devices available n packaging ?44 pin ceramic soj (package 102) ? 44 lead ceramic flatpack (package 209) n organized as two banks of 256kx16 n data byte control: lower byte (lb) = i/o 1-8 upper byte (ub) = i/o 9-16 n data i/o compatible with 3.3v devices n 2v minimum data retention for battery back up operation n commercial, industrial and military temperature range n 5 volt power supply (3.3v parts also available) n low power cmos n ttl compatible inputs and outputs * this data sheet describes a product that may or may not be under development and is subject to change or cancellation without notice. pin configuration for ws512k16-xxx a 0-17 address inputs lb lower-byte control (i/o 1-8 ) ub upper-byte control (i/o 9-16 ) i/o 1-16 data input/output cs 1-2 chip select oe output enable we write enable v cc +5.0v power gnd ground nc no connection pin description 44 csoj 44 flatpack 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 a0 a1 a2 a3 a4 cs1 i/o1 i/o2 i/o3 i/o4 v cc gnd i/o5 i/o6 i/o7 i/o8 we a5 a6 a7 a8 a9 a17 a16 a15 oe ub lb i/o16 i/o15 i/o14 i/o13 gnd v cc i/o12 i/o11 i/o10 i/o9 cs2 a14 a13 a12 a11 a10 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 ws512k16-xxx april 1998 top view block diagram 256k x 16 256k x 16 ub oe we cs 1 cs 2 i/o 1-16 a 0-17 lb
2 white microelectronics ? phoenix, az ? (602) 437-1520 3 sram monolithics ws512k16-xxx truth table absolute maximum ratings parameter symbol min max unit operating temperature t a -55 +125 c storage temperature t stg -65 +150 c signal voltage relative to gnd v g -0.5 vcc+0.5 v junction temperature t j 150 c supply voltage v cc -0.5 7.0 v recommended operating conditions parameter symbol min max unit supply voltage v cc 4.5 5.5 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.3 +0.8 v operating temp. (mil.) t a -55 +125 c parameter symbol condition max unit input capacitance c in v in = 0v, f = 1.0mhz 25 pf output capicitance c out v out = 0v, f = 1.0mhz 25 pf this parameter is guaranteed by design but not tested. capacitance (t a = +25 c) dc characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter sym conditions units min max input leakage current i li v cc = 5.5, v in = gnd to v cc 10 m a output leakage current i lo cs = v ih , oe = v ih , v out = gnd to v cc 10 m a operating supply current i cc cs = v il , oe = v ih , f = 5mhz, vcc = 5.5 290 ma standby current i sb cs = v ih , oe = v ih , f = 5mhz, vcc = 5.5 30 ma output low voltage v ol i ol = 8ma, v cc = 4.5 0.4 v output high voltage v oh i oh = -4.0ma, v cc = 4.5 2.4 v note: dc test conditions: v ih = v cc -0.3v, v il = 0.3v parameter symbol conditions units min typ max data retention supply voltage v dr cs 3 v cc -0.2v 2.0 5.5 v data retention current i ccdr1 v cc = 3v 2.0 12.0* ma * also available in low power version. please call factory for informaion. data retention characteristics (t a = -55 c to +125 c) cs 1 cs 2 we oe lb ub mode data i/o power i/o 1-8 i/o 9-16 h h x x x x not select high z high z standby lh hl output disable high z high z active lh hl l h data out high z h l h l read high z data out active l l data out data out l h data in high z l x h l write high z data in active l l data in data in hh x x xx h h hl lh hl lh
white microelectronics ? phoenix, az ? (602) 437-1520 3 sram monolithics 3 ws512k16-xxx i current source d.u.t. c = 50 pf eff i ol v 1.5v (bipolar supply) z current source oh notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z 0 = 75 w . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance. ac test circuit ac test conditions parameter typ unit input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v ac characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter symbol -17 -20 -25 -35 units read cycle min max min max min max min max read cycle time t rc 17 20 25 35 ns address access time t aa 17 20 25 35 ns output hold from address change t oh 0000ns chip select access time t acs 17 20 25 35 ns output enable to output valid t oe 10 12 15 20 ns chip select to output in low z t clz 1 2555ns output enable to output in low z t olz 1 0000ns chip disable to output in high z t chz 1 9101215ns output disable to output in high z t ohz 1 9101215ns lb, ub access time t ba 10 12 14 17 ns lb, ub enable to low z output t blz 1 0000ns lb, ub disable to high z output t bhz 1 9101215ns 1. this parameter is guaranteed by design but not tested. ac characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter symbol -17 -20 -25 -35 units write cycle min max min max min max min max write cycle time t wc 17 20 25 35 ns chip select to end of write t cw 14 17 20 25 ns address valid to end of write t aw 14 17 20 25 ns data valid to end of write t dw 10 12 15 20 ns write pulse width t wp 14 17 20 25 ns address setup time t as 0000ns address hold time t ah 0000ns output active from end of write t ow 1 0000ns write enable to output in high z t whz 1 9101015ns data hold time t dh 0000ns lb, ub valid to end of write t bw 14 17 20 25 ns 1. this parameter is guaranteed by design but not tested.
4 white microelectronics ? phoenix, az ? (602) 437-1520 3 sram monolithics ws32k32-xhx timing waveform - read cycle write cycle - cs controlled write cycle - we controlled address data i/o read cycle 1 (cs = oe = v il , ub or lb = v il , we = v ih ) t aa t oh t rc data valid previous data valid address data i/o read cycle 2 (we = v ih ) t aa t acs t oe t clz t olz t ohz t rc data valid high impedance cs oe t chz lb, ub t bhz t ba t blz address data i/o write cycle 1, we controlled t aw t cw t ah t wp t dw t whz t as t ow t dh t wc data valid cs we t bw lb, ub address data i/o write cycle 2, cs controlled t aw t as t cw t ah t wp t dh t dw t wc cs we data valid t bw lb, ub write cycle - lb, ub controlled address data i/o write cycle 3, lb, ub controlled t aw t as t cw t ah t wp t dh t dw t wc cs we data valid t bw lb, ub ws512k16-xxx
white microelectronics ? phoenix, az ? (602) 437-1520 3 sram monolithics 5 package 209: 44 lead, ceramic flat pack all linear dimensions are millimeters and parenthetically in inches 28.45 (1.120) 0.26 (0.010) 12.95 (0.510) 0.13 (0.005) 3.18 (0.125) max 0.13 (0.005) 0.05 (0.002) pin 1 identifier 1.27 (0.050) typ 9.90 (0.390) 0.13 (0.005) 26.67 (1.050) typ 10.16 (0.400) 0.51 (0.020) 0.43 (0.017) 0.05 (0.002) all linear dimensions are millimeters and parenthetically in inches package 102: 44 lead, ceramic soj 1.27 (0.050) typ 28.70 (1.13) 0.25 (0.010) pin 1 identifier 26.7 (1.050) typ 11.3 (0.446) 0.2 (0.009) 3.96 (0.156) max 0.2 (0.008) 0.05 (0.002) 9.55 (0.376) 0.25 (0.010) 1.27 (0.050) 0.25 (0.010) 0.89 (0.035) radius typ ws512k16-xxx
6 white microelectronics ? phoenix, az ? (602) 437-1520 3 sram monolithics ordering information lead finish: blank = gold plated leads a = solder dip leads device grade: m = military screened -55 c to +125 c i = industrial -40 c to +85 c c = commercial 0 c to +70 c package: dl = 44 lead ceramic soj (package 102) fl = 44 lead ceramic flatpack (package 209) access time (ns) organization, two banks of 256k x 16 sram white microelectronics ws512k16-xxx w s 512k16 - xx x x x
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